From: Ivan Kohler Date: Sat, 18 Mar 2017 19:12:05 +0000 (-0700) Subject: extend vitelity integration: start and complete port-in, RT#73618 X-Git-Url: http://git.freeside.biz/gitweb/?p=freeside.git;a=commitdiff_plain;h=e4aedf6f919c1881c113885f8afb474bdfb861b3 extend vitelity integration: start and complete port-in, RT#73618 --- diff --git a/FS/FS/part_export/vitelity.pm b/FS/FS/part_export/vitelity.pm index fe56ce247..d70929c8b 100644 --- a/FS/FS/part_export/vitelity.pm +++ b/FS/FS/part_export/vitelity.pm @@ -486,9 +486,7 @@ sub check_lnp { 'portid'=>$svc_phone->lnp_portid, ); - #XXX what $result values mean the port is done? - - if ( $result =~ /^complete$/ ) { #"complete"? nfi + if ( $result =~ /^Complete/i ) { $svc_phone->lnp_status('portedin'); my $error = $self->_export_insert($svc_phone);